About the role

What MatX Is Building MatX is on a mission to be the compute platform for Artificial General Intelligence. We are developing vertically integrated full-stack solutions from silicon to systems including hardware and software to train and run the largest Machine Learning workloads for Artificial General Intelligence.  MatX is seeking a Technical Program Manager to join our Silicon/Hardware team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for this role  will be responsible for delivering performant and functionally accurate silicon for MatX products across compute, memory management. High-speed connectivity and other key technologies. About the Role You will own the cross-functional execution framework for advanced Silicon HW programs, from early planning through tapeout. You will drive milestones, dependencies, execution reviews, decision-making forums, risk management, and tapeout readiness across multiple engineering teams. What You'll Do Here - Lead end-to-end execution of Silicon HW development programs, from concept through production, driving planning and implementation across cross-functional teams. - Partner tightly with Architecture, RTL Design, and Design Verification (DV) teams to identify bottlenecks, track coverage metrics, and mitigate risks before they impact the tapeout schedule. - Define the core operational processes and modes of work for the HW group, building and refining the stage-gate reviews required to transition smoothly from architecture into implementation and verification. - Develop playbooks and best practices for program management across the Silicon HW organization for cross-functional deliveries. - Support silicon planning across performance, power, area, cost, reliability, and manufacturability tradeoffs. - Track technical dependencies, schedule risks, owners, closure dates, critical path, program milestones, tapeout readiness, silicon bring-up deliverables, and escalation paths. - Manage technical risks related to schedule, design maturity, IP readiness, verification closure, physical signoff, package/test readiness, and supply chain. - Act as a liaison between hardware teams and company leadership, providing clear, timely updates and insights. WHO YOU ARE  - 15+ years of experience in chip/IC development as an engineer, engineering manager, or technical program manager, with at least 3 years in a technical program manager role. - Experience leading Silicon HW programs through multiple phases of the silicon lifecycle, with end-to-end chip execution from concept to silicon. - Experience driving complex cross-functional programs with multiple engineering teams, technical dependencies, external vendors, and tight schedules. - Technical fluency in SoC or chiplet design flows — enough to understand RTL milestones, DV signoff, Silicon HW handoffs, and silicon bring-up phases without needing translation. - Strong technical judgment with the ability to manage tradeoffs across performance, power, area, cost, schedule, quality, and risk. - Ability to drive schedules, dependency management, issue tracking, risk management, milestone governance, and executive-level communication. - Experience coordinating design reviews and driving closure across cross-functional engineering teams. - Strong written and verbal communication skills, including the ability to summarize technical risks, tradeoffs, decisions, and schedule impact. - Proficiency with program-management and engineering collaboration tools such as Jira, GitHub, Confluence, Smartsheet, MS Project, Google Workspace, or equivalent. BONUS POINTS IF YOU HAVE - Experience with AI infrastructure, datacenter racks, networking systems, storage systems, or high-power server platforms. - Experience coordinating programs involving high-speed interconnects, liquid-cooled systems, telemetry, diagnostics, or rack-scale validation. - Prior hands-on engineering